Zynq-7000 Base Targeted Reference Design 14.3

1 Introduction

This page provides instructions on how to build various components of the Zynq Base Targeted Reference Design (TRD) and how to setup the hardware platform and run the design on the ZC702 Evaluation Kit. The ZC702 Evaluation kit is based on a XC7Z020 CLG484-1 Zynq-7000 All Programmable SoC (AP SoC) device. For additional information, refer to UG926: Zynq-7000 All Programmable SoC: ZC702 Evaluation Kit and Video and Imaging Kit Getting Started Guide.

1.1 About the Base TRD

The Base TRD is an embedded video processing application designed to showcase various features and capabilities of the Zynq Z-7020 AP SoC device for the embedded domain. The Base TRD consists of two elements: The Zynq-7000 AP SoC Processing System (PS) and a video processing pipeline implemented in Programmable Logic (PL). The AP SoC allows the user to implement a video processing algorithm that performs edge detection on an image (Sobel filter) either as a software program running on the Zynq-7000 AP SoC based PS or as a hardware accelerator inside the AP SoC based PL. The Base TRD demonstrates how the user can seamlessly switch between a software or a hardware implementation and evaluate the cost and benefit of each implementation. The TRD also demonstrates the value of offloading computation-intensive tasks onto PL, thereby freeing the CPU resources to be available for user-specific applications. For additional information, please refer to UG925: Zynq-7000 All Programmable SoC: ZC702 Base Targeted Reference Design User Guide.

1.2 Base TRD Package Contents

The Zynq Base TRD package is released with the source code, Xilinx PlanAhead and SDK projects, and an SD card image that enables the user to run the video demonstration and software application. It also includes the binaries necessary to configure and boot the Zynq-7000 AP SoC board. This wiki page assumes the user has already downloaded the Base TRD package and extracted its contents to the Base TRD home directory referred to as ZYNQ_TRD_HOME in this wiki.

14.3_Directory_structure.jpg

2 Prerequisites

3 Building the FPGA Hardware Bitstream

This section explains how to generate the FPGA hardware bitsream using the Xilinx PlanAhead tool and how to export the hardware platform to Xilinx Software Development Kit (SDK) for software application development. Inside the PlanAhead project, a Xilinx Platform Studio (XPS) project is referenced that contains the actual hardware design.

3.1 Building the Bitstream

A pre-compiled bitstream can be found at $ZYNQ_TRD_HOME/boot_image/system.bit.

3.2 Exporting the Hardware Platform to SDK

A pre-generated hardware platform project can be found at $ZYNQ_TRD_HOME/sw/hw_platform.

4 Building the First Stage Boot Loader (FSBL)

This section explains how to import and build the First Stage Boot Loader (FSBL) and the standalone OS based Board Support Package(BSP) from the provided SDK projects. A pre-compiled FSBL executable can be found at $ZYNQ_TRD_HOME/boot_image/zynq_fsbl.elf.

Note: The provided FSBL project is a customized version of the FSBL SDK project template. The following features have been added to the Base TRD version:

  • added I2C initialization sequence for HDMI transmitter (ADV7511) on ZC702 base board
  • added I2C FMC detection sequence
  • added I2C initialization sequence for HDMI receiver (ADV7611) on Avnet IMAGEON FMC

5 Building the U-boot Boot Loader

This section explains how to download the sources, configure, and build the U-boot boot loader for the Zynq Base TRD. A pre-compiled U-boot executable can be found at $ZYNQ_TRD_HOME/boot_image/u-boot.elf. For additional information, refer to the Xilinx Zynq U-boot wiki. This step requires a Linux development PC with the ARM GNU tools and Git installed (see Section 2).

6 Building the Boot Image

This section explains how to create a boot image BOOT.bin from pre-compiled binaries provided in this package. The pre-compiled binaries are located at $ZYNQ_TRD_HOME/boot_image and include zynq_fsbl.elf, system.bit, and u-boot.elf. Alternatively, the user can use the generated files from Sections 3.1, 4, and 5. A pre-generated boot image can be found at $ZYNQ_TRD_HOME/sd_image/BOOT.bin.

7 Building the Linux Kernel

This section explains how to download the sources, configure, patch, and build the Linux kernel for the Zynq Base TRD. It also explains how to compile a device tree. For additional information, refer to the Xilinx Zynq Linux wiki. This step requires a Linux development PC with the ARM GNU tools and Git installed (see Section 2).

7.1 Building the Linux Kernel Image

A pre-compiled Linux kernel can be found at $ZYNQ_TRD_HOME/sd_image/uImage.

7.2 Building the Linux Device Tree Blob

This step requires that the steps in Section 7.1 are completed first. A pre-compiled Device Tree Blob can be found at $ZYNQ_TRD_HOME/sd_image/devicetree.dtb.

8 Building the Root File System

For instructions on how to build the Zynq Root File System, please refer to the Xilinx Zynq Root File System Creation wiki.

This TRD uses uramdisk as the root file system. mkimage command can be used for converting the ramdisk.img.gz file that is created using above link, to uramdisk.img.gz.

Note: mkimage command is created during building U-BOOT in u-boot-xlnx/tools directory (Section 5).

Use following command to convert ramdisk8M.img.gz file to uramdisk.image.gz image:

bash> export PATH=$ZYNQ_TRD_HOME/u-boot-xlnx/tools:$PATH
bash> mkimage –A arm –T ramdisk –C gzip –d ramdisk8M.img.gz uramdisk.image.gz

A pre-built ramdisk image is available at $ZYNQ_TRD_HOME/sd_image/uramdisk.image.gz.

Note: At the end of the etc/init.d/rcS script, a hook was added to execute a customized user script named init.sh. Our implementation of this script is located at $ZYNQ_TRD_HOME/sd_image/init.sh and takes care of the following Base TRD specific initialization:

  • mount the cross-compiled Qt/Qwt libraries image file (located at $ZYNQ_TRD_HOME/sd_image/qt_lib.img)
  • create Xilinx VDMA device node
  • auto-start the Qt GUI based video application on boot-up

One can modify this init.sh to change the system behavior after boot up.
For example, to avoid automatic start of qt application:

  • Remove (or comment out) the line "./run_sobel.sh -qt" from the file $ZYNQ_TRD_HOME/sd_image/init.sh

9 Building the Video Software Application(s)

The Base TRD consists of two Sobel imaging filter based video applications which differ in their user interface:

  • sobel_qt has a graphical user interface (GUI) implemented using Qt libraries and the user navigates around the application with USB keyboard and mouse.
  • sobel_cmd uses a command line based menu where the user navigates the menu by typing into the UART terminal.

The following two sections explain how to import and build each of the aforementioned video applications. The user should choose the design that is most suitable for his or her purposes.

9.1 Building the Linux Application with Command Line Interface

A pre-compiled sobel_cmd executable can be found at $ZYNQ_TRD_HOME/sd_image/sobel_cmd.elf.

9.2 Building the Linux Application with Qt GUI

A pre-compiled sobel_qt executable can be found at $ZYNQ_TRD_HOME/sd_image/sobel_qt. The executable looks for an image files to display the Zynq splash screen in images/ directory. It needs to be located in the same directory as the executable ($ZYNQ_TRD_HOME/sd_image/images/).

10 Running Video Demo Applications

This section explains through step by step instructions how to bring up the ZC702 board for video demonstration part of the TRD and running different video demonstrations out of the box.

The ZC702 Evaluation Kit comes with an SD-MMC card pre-loaded with binaries that enable the user to run the video demonstration and software applications. It also includes the binaries necessary to configure and boot the Zynq-7000 AP SoC based ZC-702 board.

Note: If the evaluation kit design files were downloaded online, copy the entire folder ZYNQ_TRD_HOME/sd_image from the package onto the primary partition of the SD-MMC card (which is formatted as FAT32) using a SD-MMC card reader.

10.1 Hardware Setup Requirements

The ZC702 board setup to run & test the video demonstration applications require the following items:

10.2 Board Setup

This section explains how to setup the ZC702 board to run and test video demonstration applications.

10.3 Running the Qt-Based GUI Application Demonstration

A Linux application with Qt-based GUI is provided with the package. This application provides options to user for using GUI with the help of a mouse & keyboard to exercise different modes of the video demonstration.

Note: The default Linux device tree binary file devicetree.dtb configures the video output resolution to 1080p @60Hz. Additionally devicetree1080p.dtb and devicetree720p.dtb files are provided along with the package to configure the video output resolution to 1920 x 1080p @60Hz and 1280 x 720p @60Hz respectively. Replace the devicetree.dtb file appropriately, based on required video-resolution.

After setting the board as explained in Section 10.2, running the Qt-Based GUI application is explained in this section.

10.4 Running the UART Menu-Based Demonstration Application

A Linux application with command line menu is also provided with the package. This application provides options to the user to exercise different modes of the video demonstration over UART communications.

Note: The default Linux device tree binary file devicetree.dtb configures the video output resolution to 1080p @60Hz. Additionally devicetree1080p.dtb and devicetree720p.dtb files are provided along with the package to configure the video output resolution to 1920 x 1080p @60Hz and 1280 x 720p @60Hz respectively. Replace the devicetree.dtb file appropriately, based on required video-resolution.

After setting the board as explained in Section 10.2, running the UART menu based application is explained in this section.

11 References

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