Flat LL TEMAC Driver

Introduction

The purpose of this page is to document the flat LL TEMAC driver that is in the kernel mainline. This driver is a pretty new driver that was submitted by Grant Likely and is based on the work of several others in the open source community.

This driver will be the path of choice in the future for new work by Xilinx.

Supported Platforms

This driver currently only functions on the PowerPC 440 processor as it uses DCR to access the DMA. We hope that will change soon as shown in the Outstanding Patches section below.

Features

  • Flat such that it was accepted into the mainline.
  • Uses the PHY lib layer of the kernel such that it should work better on other boards that have different phys.
  • Uses non-cached buffer descriptors (simpler).

Unsupported Features

  • Does not currently have support for the PowerPC 405 and MicroBlaze, but an outstanding patch should fix that.
  • Does not support checksum offload yet. Some recent prototyping in this area suggests that checksum offload for the LL TEMAC in Linux doesn't really make much difference in throughput.

Device Tree Changes

This driver requires a phy to be added to the LL TEMAC device tree entry. The device tree generator from Xilinx is not creating this yet. Note the phy address must be correct as this address below works for the ML507 and ML405 Xilinx boards.

phy-handle = < &phy7 >;
phy7: phy@7 {
    reg = <7>;
};

Outstanding Patches

There is a patch that has been submitted to the mainline to add support for non-DCR processors including the PowerPC 405 and MicroBlaze. With this patch, the driver has been tested using NFS root. It has not had a lot of performance testing done yet.

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